Use case: Start a write/read in polling indirect mode

Sequence diagram

Start a write/read in polling indirect mode

  @startuml

  == Initialization and configuration ==

  == Process polling mode ==
  "Application" -> "QSPI" : HAL_QSPI_Command()
  note right: Enable write operation
  "QSPI" --> "Application" : HAL_OK or HAL_ERROR

  "Application" -> "QSPI" : HAL_QSPI_AutoPolling()
  note right: Reconfigure QSPI to automatic polling mode to wait for write enabling
  "QSPI" --> "Application" : match completed

  group opt
  "Application" -> "QSPI" : HAL_QSPI_SetFifoThreshold()
  note right: Configure the fifo threshold
  end group

  "Application" -> "QSPI" : HAL_QSPI_Command()
  "QSPI" --> "Application" : HAL_OK or HAL_ERROR

  "Application" -> "QSPI" : HAL_QSPI_Transmit()
  "QSPI" --> "Application" :

  "Application" -> "QSPI" : HAL_QSPI_Command()
  "QSPI" --> "Application" : HAL_OK or HAL_ERROR

  "Application" -> "QSPI" : HAL_QSPI_AutoPolling()
  note right: Reconfigure QSPI to automatic polling mode to wait end of operation
  "QSPI" --> "Application" : match completed

  "Application" -> "QSPI" : HAL_QSPI_Command()
  "QSPI" --> "Application" : HAL_OK or HAL_ERROR

  "Application" -> "QSPI" : HAL_QSPI_Receive()
  "QSPI" --> "Application" :

  @enduml

Code snippet

HAL1

HAL2

/* Perform the init and configuration as per the first use case*/

QSPIHandle.Instance = QUADSPI;
QSPI_CommandTypeDef sCommand;
QSPI_AutoPollingTypeDef sConfig;

sCommand.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction       = WRITE_ENABLE_CMD;
sCommand.AddressMode       = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode          = QSPI_DATA_NONE;
sCommand.DummyCycles       = 0;
sCommand.DdrMode           = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;







HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, QPSI_TIMEOUT);

HAL_QSPI_SetFifoThreshold(&QSPIHandle, 4);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_Transmit(&QSPIHandle, &reg, QPSI_TIMEOUT);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, QPSI_TIMEOUT);

HAL_QSPI_Command(&QSPIHandle, &sCommand, QPSI_TIMEOUT);

HAL_QSPI_Receive(&QSPIHandle, &reg, QPSI_TIMEOUT);
/* Perform the init and configuration as per the first use case*/

hal_xspi_handle_t xspi;

command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.alternate_bytes = 0U;
command.alternate_bytes_width = HAL_XSPI_ALTERNATE_BYTES_8BIT;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.alternate_bytes_dtr_mode_status = HAL_XSPI_ALTERNATE_BYTES_DTR_DISABLED;
/* Specific parameters for the Sector Erase command */
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_32BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = MX25_FIRST_BLOCK_ADDR;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_32BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.data_mode = HAL_XSPI_REGULAR_DATA_NONE;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
command.size_byte = 2U;
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);

HAL_XSPI_SetFifoThreshold(&xspi, 4);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Transmit(&xspi, p_data, XSPI_TIMEOUT);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);

HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);

HAL_XSPI_Receive(&xspi, (uint8_t *)aRxBuffer, XSPI_TIMEOUT);